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1990 Tseng ET4000

1990 Tseng ET4000
Tseng Labs’ET4000AX (Source: Eep386:Wikipedia)

Founded by Jack Hsiao Nan Tseng and John J. Gibbons in Newtown, Pennsylvania, Tseng Labs developed a chipset for graphics AIBs for the IBM PC and compatibles from 1983 to December 1997. The company was best-known for the ET3000, s ET4000, and ET6000 VGA-compatible graphics chips. When Microsoft Windows 3.0 came out in 1990, the Tseng Lab’s controllers grew in popularity. Despite having a conventional DRAM frame buffer, Teng’s ET4000 family was noteworthy for its high-speed host interface (ISA) throughput. The ET 4000- was one of the last ISA-based AIBs and provided the core IP for three generations of ET4000/W32 2D accelerators.

The ET3000 series came out in September 1987, less than six months after the IBM VGA announcement. And it shipped in high volume for over two years in an era that had 50 companies producing VGA compatibles. For its day, the ET3000 was feature rich, supporting 1024×768 displays with a frame buffer size of 2 MB.

Tseng Labs developed several advanced graphics controller features that are still in today’s GPUs. They included the first integrated local bus controller and packed pixel from 8-to 24-bit color modes and Image Memory Access (IMA) that first appeared on the ET4000/W32—a high-speed asynchronous input for video or graphics into the display buffer, extended register sets, and the first local bus graphics designs. The accelerator could expand a 1-bit-per-pixel (monochrome) pixel map into an 8-bit-per­ pixel map. That was a helpful operation when painting fonts.

Using its IMA bus, Tseng was one of the first companies to incorporate a video accelerator with image processing circuits, which the Company branded VIPeR. (VideoLogic in the U.K. was developing similar technology).

 


 

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Tseng Labs ET4000 block diagram
Tseng Labs ET4000 block diagram (Source: Jon Peddie Research)

The Tseng Labs ET4000/W32i video controller was an ISA/EISA/MCA-compatible graphics chip with an 8-/16-/32-bit bus or CPU direct (local bus) interface. It featured a graphical user interface (GUI) accelerator and advanced features for developing imaging and multimedia markets. The host interface was the second generation of Tseng Labs cache/memory management architecture and featured performance that was approximately five times greater than its predecessor, the ET4000/AX. A unique feature of ET4000 architecture was that the design maximized the capabilities of DRAM and eliminated the requirement for VRAM, which reduced costs.

Toshiba fabricated the chip in their Iwate 650 nm facility.

The ET4000 was a large chip for its time. The magic of an ET4000 was a small, clever, on-chip least-recently-used (LRU) cache (the cache design got used by a software company that licensed it to many PC companies for industry-standard benchmark performance testing). Tseng later migrated the design to multi-port, allowing follow-on products to handle multiple independent dynamic bandwidths to access DRAM with almost no latency.

Among the chip’s features were a 256-raster operation capability, a high throughput graphics engine for faster hardware-accelerated BitBLT, support for a hardware-driven cursor or a second simultaneous display window, an imaging port, and memory-to-memory BLTs with masking and pixel amplification. Tseng claimed at the time that its pixel amplification could speed up text printing, color expansion, and area fill operations by up to 10 times.[1]

In 1992, IBM announced it would use Tseng’s ET4000/AX VGA graphics controller in its new 80486SX model 2133 and 2155 PS/1 PC.

The W32i offered all graphics modes, planar, or linear packed pixel modes. It had a color capability from 1 to 16.7 million. Pixel depths could be up to 32 bits per pixel. True­ color modes (16.7 million colors) were optimized in the ET4000/W32i, providing the desktop computer market with the highest quality 2D images at the time.

The first VIPeR (Video Image ProcessoR) chip came out in 1994. The VIPeR offered high-quality real-time as well as computer-generated video. Key features included a professional quality image scaler and interfaces to popular NTSC/PAL video decoders. The first-generation Viper converted YUV 4:2:2 or 4:1:1 to 24-bit RGB, while future versions output YUV and allowed color space conversion in the SuperVGA. The chips got employed in video products from Jazz Multimedia and Matrox. Tsang Labs was successful because it had more sophisticated video processing algorithms than its competitors.

By May 1994, the company achieved two consecutive quarters of increases in sales and net income. But compared to prior year periods, the results were negatively impacted by lower margins on sales of the W32 family of graphics controllers due to competitive market conditions and delays in achieving anticipated cost reductions.

According to Jack Tseng, President, “The company has started to achieve significant cost reductions on the W32i and the W32p which should begin to have an impact on our costs during the second quarter. Further cost reduction efforts are also in progress, and additional reductions are possible by the fourth quarter.”

On November 22, 1994, Tseng Labs announced two new products promising full screen, accelerated playback, and motion video capture in a lower-cost version of VIPeR.

“We now expect production ramp-up in the second half of 1994,” said Tseng. He promised the integrated ET6000 for Q2’95.

Joe Curley, Tseng’s Director of Marketing, said, “The VIPeR f/x will enable multimedia providers to develop products for sizing and scaling of video images to arbitrary window sizes from 16 x 16 pixels to 1024 x 768 in true color without dropping frames.”

It was a lower-cost version with 4:1:1 and 1024 x 768 x 24 capability.

Tseng and Joe Curley didn’t want to say much about the new semi-secret ET6000 device. Tseng said his view was a virtual port cache is the essence of the display controller. He claimed to have been building it since the ET4000.

The new chip would display multiple windows from multiple sources—telecom, graphics, audio, etc. The ET6000 would be a big, fast switcher. One of its unique features was the chip could, according to Tseng, predict the direction and frequency of upcoming data. It then could route that data to the appropriate memory. Internal data rate switching speed was forecasted to be 2 Gbytes/second. Latency would be within 1 to 2 clock cycles at 60 MHz, synchronizing within one clock cycle.

Tseng said the 6000 would come in two versions, a 3.3 and 5 volt, built in 600 nm technology that could reach 4 Gbytes/second. The 6000 would be a fully integrated controller with 135 MHz output LUT-DAC.

One of the most unique features of the ET6000 was the choice to use MDRAM for graphics memory. MDRAM provided a large array of small memory banks. Combined with a novel fast-paging memory controller in ET6000, Tseng was able to demonstrate effective utilization of over 90% of MDRAMs theoretical peak bandwidth. There would be two independent 16-bit paths to MDRAM, which could be treated as two different buses. The new device would have a 16-bit IMA, and direct system bus support for ISA, PCI, and VLB. Curley said samples might be shown at WinHec, or Spring COMDEX.1996, and it would be in a 208-pin package.

According to Jack Tseng, “It will be very competitive—it’s almost like giving all that for nothing. Like W32 pricing.”

When asked about the future, he said, “We will have 3-D in the future. There will be three separate parts in each family, a media channel and a flat panel version, in addition to the first unit.”

However, in the mid-1990s, too many companies flooded into the market. Many of them were building or said they were making 3D graphics chips. Tseng had always had competitors, and it was an aggressive company in business as well as technology. But the added competition drove down margins and, with them, the R&D budget. Also, the company misused some of its resources, further starving development.

By 1996 Tseng had lost significant market share to S3 Graphics and ATI Technologies. And, surprisingly given its novel design leadership, the company was late integrating a LUT-DAC into its controllers. It wasn’t until the ET6000 was introduced in late 1996 that it had an integrated LUT-DAC—Its competitors had been shipping such devices for over a year. Integrating the LUT-DAC lowered the cost of an AIB, giving the competitors a market advantage with the AIB builders. That severely hurt Tseng’s competitiveness.

But competition in the 2D and GUI accelerator market slowed Tseng down. Lower margins not only crippled R&D but also stretched the company’s cash flow, making it difficult for it to buy parts. It struggled to obtain adequate supplies of memory for its updated AIBs. And lacking the funds to complete the development of its 3D engine (the ET6300), the company’s board of directors decided to abandon plans to ship a next-generation part and chose instead to preserve cash and find someone to buy the company. That strategy resulted in the sale of the company to ATI.

Tseng was innovative. Crazy. Chaotic. Immature, maybe—but innovative. They did the first 132 column alpha/numeric, SuperEGA, SuperVGA, cheap true color, local bus, the first bidirectional over-the-top bus (SLI owes a lot to that), and more. But they weren’t agile and didn’t manage their books or company well.

In November 1997, the company announced a new strategic plan. Tseng and its board evaluated the company’s strategy for the commercialization of the ET6300 and future new product development and a course of action that would use the company’s resources, including $28 million in cash. Tseng decided not to complete the ET6300. Given the lead time and research and development costs required to produce new graphics products, Tseng decided to cease development efforts on all future products. However, the company said it intended to continue to work with 3D and multimedia graphics technologies to position the company for strategic partners and merger candidates.

In addition to a reported 20-30% staff reduction, Tseng announced that it would further reduce staff to just 50 essential employees.

A week later, Jack Tseng resigned. Another company founder, John J. Gibbons, replaced him as President, CEO, and Chairman of the Board.

Jack Tseng is a justifiably proud engineer who made mistakes similar to other justifiably proud engineers who founded their own companies. A string of successes breeds an understandable arrogance that is only overcome by a series of failures. Tseng rose to prominence in the EGA era and continued to preside over the company’s dominance into the days of the VGA. S3 stole the company’s thunder at the dawn of the Windows accelerator age, but Tseng came not quite roaring back with the W32 and the ET6000 designs. It was 3D that finally got the best of Tseng Labs, which loosely partnered a couple of times (S-MOS PIX, and NEC’s PowerVR) while continuing to work on their 3D technology.

On December 22, 1997, ATI announced it would acquire the graphics design assets of Tseng for approximately $3 million.

Under the terms of the purchase agreement, ATI acquired all the graphic design assets of Tseng Labs, including specific hardware and software licenses. It leased the Pennsylvania facilities of Tseng Labs. Approximately 40 key employees, including engineering and marketing personnel, accepted offers of employment with ATI’s U.S. subsidiary, ATI Research, Inc.

 

[1] W32i ET4000/W32i Graphics Accelerator Data book, Tseng Labs, (1993), https://datasheetspdf.com/pdf/502285/Tsenglabs/ET4000-W32I/1

The post 1990 Tseng ET4000 first appeared on IEEE Computer Society.

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